Pdf cpu architecture

Pdf cpu architecture

The early MIPS architectures pdf cpu architecture 32-bit, with 64-bit versions added later. Computer architecture courses in universities and technical schools often study the MIPS architecture.

The architecture greatly influenced later RISC architectures such as Alpha. As of April 2017, MIPS processors are used in embedded systems such as residential gateways and routers. The first version of the MIPS architecture was designed by MIPS Computer Systems for its R2000 microprocessor, the first MIPS implementation. Both MIPS and the R2000 were introduced together in 1985. MIPS I has thirty-two 32-bit general-purpose registers. 0 is hardwired to zero and writes to it are discarded.

For integer multiplication and division instructions, which run asynchronously from other instructions, a pair of 32-bit registers, HI and LO, are provided. The program counter has 32 bits. The two low-order bits always contain zero since MIPS I instructions are 32 bits long and are aligned to their natural word boundaries. Instructions are divided into three types: R, I and J. Every instruction starts with a 6-bit opcode.


Comments are closed.